AO4486 100v n-channel mosfet general description product summary v ds i d (at v gs =10v) 4.2a r ds(on) (at v gs =10v) < 79m w r ds(on) (at v gs = 4.5v) < 90m w 100% uis tested 100% r g tested symbol v ds the AO4486 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) .this device is ideal for boost converters and synchronous rectifiers for consumer, telecom, industrial power supplies and led backligh ting. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v drain-source voltage 100 g d s soic-8 top view bottom view d d d d s s s g v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jl gate-source voltage 3.4 31 mj junction and storage temperature range -55 to 150 c 2 v 20 t a =25c t a =70c avalanche current c 4.2 power dissipation b p d units thermal characteristics parameter typ max avalanche energy l=0.1mh c pulsed drain current c continuous drain current t a =70c c/w c/w 59 40 a i d 10 a 14 c/w w r q ja v drain-source voltage 100 31 24 maximum junction-to-ambient a t a =25c 3.1 maximum junction-to-lead maximum junction-to-ambient a d 16 75 g d s soic-8 top view bottom view d d d d s s s g rev 0: sep 2010 www.aosmd.com page 1 of 6
AO4486 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.6 2.2 2.7 v i d(on) 31 a 62.5 79 t j =125c 121 151 68.5 90 m w g fs 20 s v sd 0.74 1 v i s 3.5 a c iss 620 778 942 pf c oss 38 55 81 pf c rss 13 24 35 pf r g 0.7 1.45 2.2 w q g (10v) 13 16.3 20 nc q g (4.5v) 6.4 8.1 10 nc q gs 2.2 2.8 3.4 nc q gd 2.4 4.1 5.8 nc t d(on) 6 ns t 2.5 ns maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time v =10v, v =50v, r =16.7 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =50v, i d =3.0a gate source charge r ds(on) static drain-source on-resistance m w i s =1a,v gs =0v v ds =5v, i d =3a v gs =4.5v, i d =3a diode forward voltage electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a zero gate voltage drain current drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =3a reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz switching parameters v ds =v gs i d =250 m a v ds =0v, v gs = 20v gate-body leakage current forward transconductance gate drain charge total gate charge t r 2.5 ns t d(off) 21 ns t f 2.4 ns t rr 14 21 28 ns q rr 65 94 123 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =3a, di/dt=500a/ m s turn-on rise time turn-off delaytime v gs =10v, v ds =50v, r l =16.7 w , r gen =3 w turn-off fall time body diode reverse recovery time i f =3a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedence which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150 c. the soa curve provides a single pulse rating. rev 0: sep 2010 www.aosmd.com page 2 of 6
AO4486 typical electrical and thermal characteristics 17 52 10 0 18 0 5 10 15 20 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 50 60 70 80 90 100 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1.2 1.6 2 2.4 2.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =3a v gs =10v i d =3a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 5 10 15 20 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 10v 3.5v 40 0 5 10 15 20 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 50 60 70 80 90 100 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1.2 1.6 2 2.4 2.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =3a v gs =10v i d =3a 50 70 90 110 130 150 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =3a 25 c 125 c 0 5 10 15 20 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 10v 3.5v rev 0: sep 2010 www.aosmd.com page 3 of 6
AO4486 typical electrical and thermal characteristics 0 2 4 6 8 10 0 5 10 15 20 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =50v i d =3a 0.0 0.1 1.0 10.0 100.0 0.1 1 10 100 i d (amps) v ds (volts) figure 10: maximum forward biased safe operating area (note f) 10 m s 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms 1.0 10.0 100.0 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 9: single pulse avalanche capability (note c ) t a =25 c t a =150 c t a =100 c t a =125 c 0 2 4 6 8 10 0 5 10 15 20 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =50v i d =3a 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) figure 11: single pulse power rating junction-to-am bient (note f) t a =25 c 0.0 0.1 1.0 10.0 100.0 0.1 1 10 100 i d (amps) v ds (volts) figure 10: maximum forward biased safe operating area (note f) 10 m s 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms 1.0 10.0 100.0 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 9: single pulse avalanche capability (note c ) t a =25 c t a =150 c t a =100 c t a =125 c rev 0: sep 2010 www.aosmd.com page 4 of 6
AO4486 typical electrical and thermal characteristics 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 12: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =75 c/w 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 12: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =75 c/w rev 0: sep 2010 www.aosmd.com page 5 of 6
AO4486 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vgs vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0: sep 2010 www.aosmd.com page 6 of 6
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